Synthesis converts RTL code into a gate-level netlist of logical components, while place-and-route takes that netlist and physically arranges and wires those components on the actual chip layout.
These are two sequential steps in the VLSI design flow, bridging the gap from abstract logic to a manufacturable physical chip.
A synthesis tool reads RTL code (describing what the circuit should do) and maps it to a netlist made of standard logic cells (like AND gates, flip-flops) from a specific manufacturing technology library — essentially translating "what" the circuit does into "which specific components" implement it.
This takes that netlist and figures out exactly where each cell physically sits on the chip ("placement") and how to wire them all together with metal interconnects ("routing"), while meeting timing, power, and area constraints. The output of this stage is the actual physical layout sent to the semiconductor foundry for manufacturing.
Last reviewed: September 2026